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» Transistor-Level Timing Analysis Using Embedded Simulation
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ISCA
2003
IEEE
93views Hardware» more  ISCA 2003»
15 years 8 months ago
Improving Dynamic Cluster Assignment for Clustered Trace Cache Processors
This work examines dynamic cluster assignment for a clustered trace cache processor (CTCP). Previously proposed cluster assignment techniques run into unique problems as issue wid...
Ravi Bhargava, Lizy Kurian John
109
Voted
EMSOFT
2006
Springer
15 years 6 months ago
Real-time interfaces for composing real-time systems
Recently, a number of frameworks were proposed to extend interface theory to the domains of single-processor and distributed real-time systems. This paper unifies some of these ap...
Lothar Thiele, Ernesto Wandeler, Nikolay Stoimenov
94
Voted
FSE
2004
Springer
90views Cryptology» more  FSE 2004»
15 years 8 months ago
Fast Software-Based Attacks on SecurID
SecurID is a widely used hardware token for strengthening authentication in a corporate environment. Recently, Biryukov, Lano, and Preneel presented an attack on the alleged SecurI...
Scott Contini, Yiqun Lisa Yin
119
Voted
ICML
1995
IEEE
16 years 3 months ago
Learning to Make Rent-to-Buy Decisions with Systems Applications
In the single rent-to-buy decision problem, without a priori knowledge of the amount of time a resource will be used we need to decide when to buy the resource, given that we can ...
P. Krishnan, Philip M. Long, Jeffrey Scott Vitter
140
Voted
CODES
2003
IEEE
15 years 8 months ago
A multiobjective optimization model for exploring multiprocessor mappings of process networks
In the Sesame framework, we develop a modeling and simulation environment for the efficient design space exploration of heterogeneous embedded systems. Since Sesame recognizes se...
Cagkan Erbas, Selin C. Erbas, Andy D. Pimentel