1640 search results - page 31 / 328 » Transistor-Level Timing Analysis Using Embedded Simulation |
131
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RTSS
2007
IEEE
15 years 8 months ago
2007
IEEE
Recently, cheap and large capacity non-volatile memory such as flash memory is rapidly replacing disks not only in embedded systems, but also in high performance servers. Unlike ...
114
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CODES
2005
IEEE
15 years 7 months ago
2005
IEEE
In embedded cryptosystems, sensitive information can leak via timing, power, and electromagnetic channels. We introduce a novel power-smart system-on-chip architecture that provid...
137
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JSA
2000
15 years 2 months ago
2000
In this article, the problem of finding a tight estimate on the worst-case execution time (WCET) of a real-time program is addressed. The analysis is focused on straight-line code...
137
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JUCS
2010
14 years 9 months ago
2010
Abstract: Model-Driven Architecture (MDA) presents a set of layered models to separate design concerns from platform concerns. The model executability for each model element is sti...
133
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DAC
2008
ACM
2008
ACM
Model checking based analysis of end-to-end latency in embedded, real-time systems with clock drifts
16 years 3 months ago
End-to-end latency of messages is an important design parameter that needs to be within specified bounds for the correct functioning of distributed real-time control systems. In t...