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» Transistor-Level Timing Analysis Using Embedded Simulation
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113
Voted
DATE
2010
IEEE
171views Hardware» more  DATE 2010»
15 years 7 months ago
Digital statistical analysis using VHDL
—Variations of process parameters have an important impact on reliability and yield in deep sub micron IC technologies. One methodology to estimate the influence of these effects...
Manfred Dietrich, Uwe Eichler, Joachim Haase
JTRES
2009
ACM
15 years 8 months ago
Using hardware methods to improve time-predictable performance in real-time Java systems
This paper describes hardware methods, a lightweight and platform-independent scheme for linking real-time Java code to co-processors implemented using a hardware description lang...
Jack Whitham, Neil C. Audsley, Martin Schoeberl
110
Voted
WSC
2000
15 years 3 months ago
Improved decision processes through simultaneous simulation and time dilation
Simulation models are often not used to their full potential in the decision-making process. The default simulation strategy of simple serial replication of fixed length runs mean...
Paul Hyden, Lee Schruben
ISQED
2005
IEEE
92views Hardware» more  ISQED 2005»
15 years 8 months ago
An Interconnect Insensitive Linear Time-Varying Driver Model for Static Timing Analysis
This paper presents a two-step, RC-interconnect insensitive linear time-varying (LTV) driver model for gate-level timing calculation. We show how to characterize a driver with the...
Chung-Kuan Tsai, Malgorzata Marek-Sadowska
RTAS
2006
IEEE
15 years 8 months ago
Estimating the Worst-Case Energy Consumption of Embedded Software
The evolution of battery technology is not being able to keep up with the increasing performance demand of mobile embedded systems. Therefore, battery life has become an important...
Ramkumar Jayaseelan, Tulika Mitra, Xianfeng Li