1640 search results - page 44 / 328 » Transistor-Level Timing Analysis Using Embedded Simulation |
145
Voted
IPPS
2006
IEEE
15 years 8 months ago
2006
IEEE
Advanced wireless sensor network algorithms pose challenges to their formal modeling and analysis, such as modeling probabilistic and real-time behaviors and novel forms of commun...
116
Voted
CODES
2008
IEEE
15 years 8 months ago
2008
IEEE
Application-specific system-on-chip platforms create the opportunity to customize the cache configuration for optimal performance with minimal chip estate. Simulation, in partic...
113
Voted
DATE
1997
IEEE
15 years 6 months ago
1997
IEEE
This paper proposes extensions to the VHDL grammar and de nes new semantics in the language to model the timing behavior of high frequency buses and clock lines with multiple, dis...
165
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RTAS
1996
IEEE
15 years 6 months ago
1996
IEEE
Recent progress in worst case timing analysis of programs has made it possible to perform accurate timing analysis of pipelined execution and instruction caching, which is necessa...
149
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RTAS
2008
IEEE
15 years 8 months ago
2008
IEEE
Embedded systems are often subject to constraints that require determinism to ensure that task deadlines are met. Such systems are referred to as real-time systems. Schedulability...