1640 search results - page 46 / 328 » Transistor-Level Timing Analysis Using Embedded Simulation |
162
Voted
ISSS
1996
IEEE
15 years 6 months ago
1996
IEEE
The application range of the embedded computing is going to cover the majority of the market products spanning from consumer electronic, automotive, telecom and process control. F...
136
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EPIA
2003
Springer
15 years 7 months ago
2003
Springer
Abstract. This paper describes jcc, an integration of the timed default concurrent constraint programming framework [16] (Timed Default cc) into JAVA [7]. jcc is intended for use i...
127
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ICCAD
1993
IEEE
15 years 6 months ago
1993
IEEE
Circuit simulation is one of the most computationally expensive tasks in circuit design and optimization. Detailed simulation at the level of precision of SPICE is usually perform...
107
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ICCAD
2006
IEEE
15 years 11 months ago
2006
IEEE
— For 65nm and below devices, even after optical proximity correction (OPC), the gate may still be non-rectangular. There are several limited works on the device and circuit char...
120
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IPPS
1998
IEEE
15 years 6 months ago
1998
IEEE
Predicting the running time of a parallel program is useful for determining the optimal values for the parameters of the implementation and the optimal mapping of data on processo...