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» Transistor-Level Timing Analysis Using Embedded Simulation
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WSC
2007
15 years 4 months ago
Special purpose simulation template for workflow analysis in construction
Workflow analysis is an important component in the simulation of construction operations. It involves creating a specific number of work requests for a crew every time period, com...
Sivakumar Palaniappan, Anil Sawhney, Howard H. Bas...
CODES
2001
IEEE
15 years 6 months ago
System canvas: a new design environment for embedded DSP and telecommunication systems
We present a new design environment, called System Canvas, targeted at DSP and telecommunication system designs. Our environment uses an easy-to-use block-diagram syntax to specif...
Praveen K. Murthy, Etan G. Cohen, Steve Rowland
RTCSA
2006
IEEE
15 years 8 months ago
Portable Execution Time Analysis Method
We propose a new execution time prediction method that combines measurement-based execution time analysis and simulation-based memory access analysis. In measurement-based executi...
Keiji Yamamoto, Yutaka Ishikawa, Toshihiro Matsui
SCHOLARPEDIA
2011
14 years 5 months ago
N-body simulations
Abstract. Scientists’ ability to generate and collect massive-scale datasets is increasing. As a result, constraints in data analysis capability rather than limitations in the av...
RTCSA
2009
IEEE
15 years 9 months ago
Branch Target Buffers: WCET Analysis Framework and Timing Predictability
—One step in the verification of hard real-time systems is to determine upper bounds on the worst-case execution times (WCET) of tasks. To obtain tight bounds, a WCET analysis h...
Daniel Grund, Jan Reineke, Gernot Gebhard