1640 search results - page 76 / 328 » Transistor-Level Timing Analysis Using Embedded Simulation |
107
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RTCSA
2000
IEEE
15 years 6 months ago
2000
IEEE
A space efficient wait-free algorithm for implementing a shared buffer for real-time multiprocessor systems is presented in this paper. The commonly used method to implement share...
128
Voted
FDL
2008
IEEE
15 years 9 months ago
2008
IEEE
Constraint-based random simulation is state-of-the-art in verification of multi-million gate industrial designs. This method is based on stimulus generation by constraint solving...
120
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WSC
1998
15 years 3 months ago
1998
Carousel storage systems are often used to increase storage density, throughput and efficiency while reducing inventory and man-hours. The Hewlett-Packard company has developed a ...
130
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LCTRTS
2004
Springer
15 years 8 months ago
2004
Springer
This paper presents Spinach, a new simulator toolset specifically designed to target programmable network interface architectures. Spinach models both system components that are ...
109
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TON
1998
15 years 2 months ago
1998
This paper describes the analysis, implementation and performance of a new algorithm engineered to discipline a computer clock to a source of standard time, such as a GPS receiver...