1640 search results - page 88 / 328 » Transistor-Level Timing Analysis Using Embedded Simulation |
146
Voted
RTCSA
2008
IEEE
15 years 9 months ago
2008
IEEE
Reliability-aware power management (RAPM) schemes, which consider the negative effects of voltage scaling on system reliability, were recently studied to save energy while preserv...
139
Voted
RTCSA
2007
IEEE
15 years 9 months ago
2007
IEEE
This paper presents a real-time scheduling algorithm with high schedulability and few preemptions for multiprocessor systems. The algorithm is based on an unorthodox method called...
122
Voted
ISCA
1997
IEEE
15 years 6 months ago
1997
IEEE
Improvements in main memory speeds have not kept pace with increasing processor clock frequency and improved exploitation of instruction-level parallelism. Consequently, the gap b...
124
Voted
VTC
2008
IEEE
15 years 9 months ago
2008
IEEE
— In this paper, we provide a framework for the asymptotic performance analysis of space–time codes (STCs) in correlated Ricean fading and non–Gaussian noise and interference...
124
Voted
DAC
2008
ACM
16 years 3 months ago
2008
ACM
Today, embedded processors are expected to be able to run complex, algorithm-heavy applications that were originally designed and coded for general-purpose processors. As a result...