1640 search results - page 89 / 328 » Transistor-Level Timing Analysis Using Embedded Simulation |
113
Voted
WSC
2004
15 years 4 months ago
2004
While the literature contains several adaptive sampling techniques for statistical comparison of competing simulated system configurations and for embedded statistical computation...
ITC
1999
IEEE
15 years 7 months ago
1999
IEEE
Transient Signal Analysis is a digital device testing method that is based on the analysis of voltage transients at multiple test points. The power supply transient signals of an ...
136
Voted
WSC
1998
15 years 4 months ago
1998
Distributed synchronization for parallel simulation is generally classified as being either optimistic or conservative. While considerable investigations have been conducted to an...
100
Voted
DATE
2006
IEEE
15 years 8 months ago
2006
IEEE
In this paper we propose a dynamic code overlay technique of synchronous data-flow (SDF) –modeled program for low-end embedded systems which lack MMUsupport. With this technique...
124
Voted
SIGSOFT
2010
ACM
14 years 9 months ago
2010
ACM
This presentation demonstrates the early results from the French ANR project RT-Simex. RT-Simex proposes a set of tools to analyze timing of parallel embedded code and trace the s...