1640 search results - page 9 / 328 » Transistor-Level Timing Analysis Using Embedded Simulation |
AINA
2007
IEEE
15 years 6 months ago
2007
IEEE
Continuous improvements in integration scale have made major microprocessor vendors to move to designs that integrate several processor cores on the same chip. Chip-multiprocessor...
110
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WORDS
2002
IEEE
15 years 4 months ago
2002
IEEE
Certainly, in hard real-time systems, it is reasonable to argue that no hard real-time threads should behave in an unpredictable way and that schedulability should be guaranteed b...
100
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WCET
2008
15 years 1 months ago
2008
We propose an approach for timing analysis of software-based embedded computer systems that builds on the established probabilistic framework of Bayesian networks. We envision an ...
103
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LCTRTS
1998
Springer
15 years 3 months ago
1998
Springer
Abstract. Previously published methods for estimation of the worstcase execution time on contemporary processors with complex pipelines and multi-level memory hierarchies result in...
CODES
1998
IEEE
15 years 3 months ago
1998
IEEE
Timing analysis for checking satisfaction of constraints is a crucial problem in real-time system design. In some current approaches, the delay of software modules is precalculate...