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EUROCAST
2007
Springer
159views Hardware» more  EUROCAST 2007»
15 years 1 months ago
Ant Colony Optimization for Model Checking
Abstract Model Checking is a well-known and fully automatic technique for checking software properties, usually given as temporal logic formulas on the program variables. Most of m...
Enrique Alba, J. Francisco Chicano
CAV
2004
Springer
151views Hardware» more  CAV 2004»
15 years 1 months ago
QB or Not QB: An Efficient Execution Verification Tool for Memory Orderings
We study the problem of formally verifying shared memory multiprocessor executions against memory consistency models--an important step during post-silicon verification of multipro...
Ganesh Gopalakrishnan, Yue Yang, Hemanthkumar Siva...
FCCM
2004
IEEE
152views VLSI» more  FCCM 2004»
15 years 1 months ago
Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
Noriaki Suzuki, Shunsuke Kurotaki, Masayasu Suzuki...
EMSOFT
2006
Springer
15 years 1 months ago
Analysis of the zeroconf protocol using UPPAAL
We report on a case study in which the model checker Uppaal is used to formally model parts of Zeroconf, a protocol for dynamic configuration of IPv4 link-local addresses that has...
Biniam Gebremichael, Frits W. Vaandrager, Miaomiao...
ICCAD
1997
IEEE
137views Hardware» more  ICCAD 1997»
15 years 1 months ago
Optimization techniques for high-performance digital circuits
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
Chandramouli Visweswariah