Sciweavers

528 search results - page 79 / 106
» Transition Logic Revisited
Sort
View
DATE
2004
IEEE
142views Hardware» more  DATE 2004»
15 years 5 months ago
Eliminating False Positives in Crosstalk Noise Analysis
Noise affects circuit operation by increasing gate delays and causing latches to capture incorrect values. Noise analysis techniques can detect some of such noise faults, but accu...
Yajun Ran, Alex Kondratyev, Yosinori Watanabe, Mal...
DELTA
2006
IEEE
15 years 5 months ago
Synthesis of Nanoelectronic Circuits on Delay-Insensitive Cellular Arrays
The difficulties of designing nanoscale circuits include the need for regular circuit structure and controlling the timing requirements. A cellular array has highly regular struct...
Jia Di, Dilip P. Vasudevan
ECAI
2006
Springer
15 years 5 months ago
Background Default Knowledge and Causality Ascriptions
A model is defined that predicts an agent's ascriptions of causality (and related notions of facilitation and justification) between two events in a chain, based on background...
Jean-François Bonnefon, Rui Da Silva Neves,...
FMCAD
2006
Springer
15 years 5 months ago
Formal Analysis and Verification of an OFDM Modem Design using HOL
In this paper we formally specify and verify an implementation of the IEEE802.11a standard physical layer based OFDM (Orthogonal Frequency Division Multiplexing) modem using the HO...
Abu Nasser Mohammed Abdullah, Behzad Akbarpour, So...
FPL
1995
Springer
106views Hardware» more  FPL 1995»
15 years 5 months ago
Some Notes on Power Management on FPGA-Based Systems
Although the energy required to perform a logic operation has continuously dropped at least by ten orders of magnitude since early vacuumtube electronics [1], the increasing clock ...
Eduardo I. Boemo, Guillermo González de Riv...