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CAV
2000
Springer
141views Hardware» more  CAV 2000»
15 years 4 months ago
Binary Reachability Analysis of Discrete Pushdown Timed Automata
We introduce discrete pushdown timed automata that are timed automata with integer-valued clocks augmented with a pushdown stack. A con guration of a discrete pushdown timed automa...
Zhe Dang, Oscar H. Ibarra, Tevfik Bultan, Richard ...
IFM
1999
Springer
15 years 4 months ago
Integration Problems in Telephone Feature Requirements
The feature interaction problem is prominent in telephone service development. Through a number of case studies, we have discovered that no single semantic framework is suitable f...
J. Paul Gibson, Geoff Hamilton, Dominique Mé...
107
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GLVLSI
1998
IEEE
122views VLSI» more  GLVLSI 1998»
15 years 4 months ago
Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...
Luca Benini, Giovanni De Micheli, Alberto Macii, E...
TABLEAUX
1998
Springer
15 years 3 months ago
Model Checking: Historical Perspective and Example (Extended Abstract)
ple (Extended Abstract) Edmund M. Clarke and Sergey Berezin Carnegie Mellon University -- USA Model checking is an automatic verification technique for finite state concurrent syst...
Edmund M. Clarke, Sergey Berezin
TAPSOFT
1997
Springer
15 years 3 months ago
The Railroad Crossing Problem: Towards Semantics of Timed Algorithms and Their Model Checking in High Level Languages
The goal of this paper is to analyse semantics of algorithms with explicit continuous time with further aim to nd approaches to automatize model checking in high level, easily unde...
Danièle Beauquier, Anatol Slissenko