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ASYNC
2007
IEEE
129views Hardware» more  ASYNC 2007»
15 years 1 months ago
Formal Verification of CHP Specifications with CADP Illustration on an Asynchronous Network-on-Chip
Few formal verification techniques are currently available for asynchronous designs. In this paper, we describe a new approach for the formal verification of asynchronous architec...
Gwen Salaün, Wendelin Serwe, Yvain Thonnart, ...
ENTCS
2002
143views more  ENTCS 2002»
14 years 9 months ago
Collecting Statistics over Runtime Executions
Abstract. We present an extension to linear-time temporal logic (LTL) that combines the temporal specification with the collection of statistical data. By collecting statistics ove...
Bernd Finkbeiner, Sriram Sankaranarayanan, Henny S...
INFORMS
1998
150views more  INFORMS 1998»
14 years 9 months ago
Branch and Infer: A Unifying Framework for Integer and Finite Domain Constraint Programming
constraint abstractions into integer programming, and to discuss possible combinations of the two approaches. Combinatorial problems are ubiquitous in many real world applications ...
Alexander Bockmayr, Thomas Kasper
76
Voted
IJCAI
1989
14 years 10 months ago
On the Declarative Semantics of Inheritance Networks
Usually, semantics of inheritance networks is specified indirectly through a translation into one of the standard logical formalisms. Since such translation involves an algorithmi...
Krishnaprasad Thirunarayan, Michael Kifer, David S...
LREC
2008
139views Education» more  LREC 2008»
14 years 11 months ago
Identification of Comparable Argument-Head Relations in Parallel Corpora
We present the machine learning framework that we are developing, in order to support explorative search for non-trivial linguistic configurations in low-density languages (langua...
Kathrin Spreyer, Jonas Kuhn, Bettina Schrader