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SASP
2008
IEEE
140views Hardware» more  SASP 2008»
15 years 4 months ago
An FPGA Design Space Exploration Tool for Matrix Inversion Architectures
— Matrix inversion is a common function found in many algorithms used in wireless communication systems. As FPGAs become an increasingly attractive platform for wireless communic...
Ali Irturk, Bridget Benson, Shahnam Mirzaei, Ryan ...
ASAP
2007
IEEE
97views Hardware» more  ASAP 2007»
14 years 12 months ago
FPGA-Based Efficient Design Approach for Large-Size Two's Complement Squarers
This paper presents an optimized design approach of two’s complement large-size squarers using embedded multipliers in FPGAs. The realization is based on BaughWooley’s algorit...
Shuli Gao, Noureddine Chabini, Dhamin Al-Khalili, ...
FPGA
1995
ACM
142views FPGA» more  FPGA 1995»
15 years 1 months ago
The Design of RPM: An FPGA-based Multiprocessor Emulator
Recent advances in Field-Programmable Gate Arrays (FPGA) and programmable interconnects have made it possible to build efficient hardware emulation engines. In addition, improveme...
Koray Öner, Luiz André Barroso, Sasan ...
VLSI
2010
Springer
14 years 4 months ago
A design workflow for dynamically reconfigurable multi-FPGA systems
Multi-FPGA systems (MFS's) represent a promising technology for various applications, such as the implementation of supercomputers and parallel and computational intensive emu...
Alessandro Panella, Marco D. Santambrogio, Frances...
GLVLSI
2005
IEEE
186views VLSI» more  GLVLSI 2005»
15 years 3 months ago
An FPGA design of AES encryption circuit with 128-bit keys
This paper addresses a pipelined partial rolling (PPR) architecture for the AES encryption. The key technique is the PPR architecture, which is suitable for FPGA implementation. U...
Hui Qin, Tsutomu Sasao, Yukihiro Iguchi