1240 search results - page 117 / 248 » Trusted Design in FPGAs |
DAC
2004
ACM
15 years 11 months ago
2004
ACM
This paper shows a method to decompose a given multipleoutput circuit into two circuits with intermediate outputs. We use a BDD for characteristic function (BDD for CF) to represe...
ARC
2009
Springer
15 years 5 months ago
2009
Springer
Abstract. In this paper, we present CCProc, a flexible cryptography coprocessor for symmetric-key algorithms. Based on an extensive analysis of many symmetric-key ciphers, includi...
75
Voted
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
- Clock skew scheduling (CSS) is an effective technique to optimize clock period of sequential designs. However, these techniques are not effective in the presence of certain desig...
ISCAS
2003
IEEE
15 years 3 months ago
2003
IEEE
Reconfigurable Computers based on a combination of conventional microprocessors and Field Programmable Gate Arrays (FPGAs) presents new challenges to designers. Debugging on such ...
FPL
2003
Springer
15 years 3 months ago
2003
Springer
This paper introduces the notion of a software decelerator, to be used in logic-centric system architectures. Functions are offloaded from logic to a processor, accepting a speed ...