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FPL
1999
Springer
103views Hardware» more  FPL 1999»
15 years 2 months ago
IP Validation for FPGAs Using Hardware Object Technology
Although verification and simulation tools are always improving, the results they provide remain hard to analyze and interpret. On one hand, verification sticks to the functional ...
Steve Casselman, John Schewel, Christophe Beaumont
FPL
2006
Springer
208views Hardware» more  FPL 2006»
15 years 1 months ago
Implementation in Fpgas of Jacobi Method to Solve the Eigenvalue and Eigenvector Problem
This work shows a modular architecture based on FPGA's to solve the eigenvalue problem according to the Jacobi method. This method is able to solve the eigenvalues and eigenv...
Ignacio Bravo, Pedro Jiménez, Manuel Mazo, ...
FPL
2000
Springer
130views Hardware» more  FPL 2000»
15 years 1 months ago
Area-Optimized Technology Mapping for Hybrid FPGAs
As integration levels in FPGA devices have increased over the past decade, the structure of programmable logic resources has become more diversified. Recently, Altera Corporation h...
Srini Krishnamoorthy, Sriram Swaminathan, Russell ...
CAI
2004
Springer
14 years 9 months ago
An Evolvable Combinational Unit for FPGAs
A complete hardware implementation of an evolvable combinational unit for FPGAs is presented. The proposed combinational unit consisting of a virtual reconfigurable circuit and evo...
Lukás Sekanina, Stepan Friedl
IPPS
2006
IEEE
15 years 3 months ago
Placement and routing of Boolean functions in constrained FPGAs using a distributed genetic algorithm and local search
In this work we present a system for implementing the placement and routing stages in the FPGA cycle of design, into the physical design stage. We start with the ISCAS benchmarks,...
Manuel Rubio del Solar, Juan Manuel Sánchez...