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» Trusted Design in FPGAs
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ATAL
2004
Springer
15 years 3 months ago
Trust-Based Mechanism Design
We define trust-based mechanism design as an augmentation of traditional mechanism design in which agents take into account the degree of trust that they have in their counterpar...
Rajdeep K. Dash, Sarvapali D. Ramchurn, Nicholas R...
IUI
2006
ACM
15 years 3 months ago
Trust building with explanation interfaces
Based on our recent work on the development of a trust model for recommender agents and a qualitative survey, we explore the potential of building users’ trust with explanation ...
Pearl Pu, Li Chen
68
Voted
ICCAD
2006
IEEE
111views Hardware» more  ICCAD 2006»
15 years 6 months ago
Mapping arbitrary logic functions into synchronous embedded memories for area reduction on FPGAs
This work describes a new mapping technique, RAM-MAP, that identifies parts of circuits that can be efficiently mapped into the synchronous embedded memories found on field prog...
Gordon R. Chiu, Deshanand P. Singh, Valavan Manoha...
ISLPED
2005
ACM
91views Hardware» more  ISLPED 2005»
15 years 3 months ago
LAP: a logic activity packing methodology for leakage power-tolerant FPGAs
As FPGAs enter the nanometer regime, several modifications are needed to reduce the increasing leakage power dissipation. Hence, this work presents some modifications to the FPG...
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
DAC
2003
ACM
15 years 3 months ago
Fast timing-driven partitioning-based placement for island style FPGAs
In this paper we propose a partitioning-based placement algorithm for FPGAs. The method incorporates simple, but effective heuristics that target delay minimization. The placement...
Pongstorn Maidee, Cristinel Ababei, Kia Bazargan