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» Trusted Design in FPGAs
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DAC
2009
ACM
15 years 4 months ago
Information hiding for trusted system design
For a computing system to be trusted, it is equally important to verify that the system performs no more and no less functionalities than desired. Traditional testing and verifica...
Junjun Gu, Gang Qu, Qiang Zhou
VLSID
2005
IEEE
128views VLSI» more  VLSID 2005»
15 years 10 months ago
On-Line Synthesis for Partially Reconfigurable FPGAs
An important application of dynamically and partially reconfigurable computing platforms is in dynamic task allocation and execution. On-line synthesis, on-line placement and on-l...
Renqiu Huang, Ranga Vemuri
FPGA
2007
ACM
153views FPGA» more  FPGA 2007»
15 years 4 months ago
GlitchLess: an active glitch minimization technique for FPGAs
This paper describes a technique that reduces dynamic power in FPGAs by reducing the number of glitches in the global routing resources. The technique involves adding programmable...
Julien Lamoureux, Guy G. Lemieux, Steven J. E. Wil...
DATE
2003
IEEE
69views Hardware» more  DATE 2003»
15 years 3 months ago
Performance-Directed Retiming for FPGAs Using Post-Placement Delay Information
In today’s deep-submicron designs, the interconnect delays contribute an increasing part to the overall performance of an implementation. Particularly when targeting field prog...
Ulrich Seidl, Klaus Eckl, Frank M. Johannes
FCCM
2004
IEEE
107views VLSI» more  FCCM 2004»
15 years 1 months ago
An Alternate Wire Database for Xilinx FPGAs
This paper presents ADB, an Alternate Wire Database, suitable for routing, tracing, and browsing in Xilinx Virtex, Virtex-E, Virtex-II, and Virtex-II Pro FPGAs. While mainstream d...
Neil Steiner, Peter M. Athanas