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GECCO
2007
Springer
184views Optimization» more  GECCO 2007»
15 years 1 months ago
Multi-objective optimization tool for a free structure analog circuits design using genetic algorithms and incorporating parasit
This paper presents a novel approach for a free structure analog circuit design using Genetic Algorithms (GA). A major problem in a free structure circuit is its sensitivity calcu...
Yaser M. A. Khalifa, Badar K. Khan, Faisal Taha
BMCBI
2007
128views more  BMCBI 2007»
14 years 9 months ago
A robust and efficient algorithm for the shape description of protein structures and its application in predicting ligand bindin
Background: An accurate description of protein shape derived from protein structure is necessary to establish an understanding of protein-ligand interactions, which in turn will l...
Lei Xie, Philip E. Bourne
VTS
2005
IEEE
89views Hardware» more  VTS 2005»
15 years 3 months ago
Synthesis of Low Power CED Circuits Based on Parity Codes
An automated design procedure is described for synthesizing circuits with low power concurrent error detection. It is based on pre-synthesis selection of a parity-check code follo...
Shalini Ghosh, Sugato Basu, Nur A. Touba
COCO
2010
Springer
186views Algorithms» more  COCO 2010»
15 years 1 months ago
Derandomized Parallel Repetition of Structured PCPs
A PCP is a proof system for NP in which the proof can be checked by a probabilistic verifier. The verifier is only allowed to read a very small portion of the proof, and in return ...
Irit Dinur, Or Meir
VLSID
2007
IEEE
104views VLSI» more  VLSID 2007»
15 years 10 months ago
Customization of Register File Banking Architecture for Low Power
Register file banking is an effective alternative to monolithic register files in embedded processor based systems. In this work, we propose techniques for performing application s...
Rakesh Nalluri, Rohan Garg, Preeti Ranjan Panda