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» Two VLSI Design Advances in Arithmetic Coding
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COMSWARE
2007
IEEE
15 years 4 months ago
A Parallelization of ECDSA Resistant to Simple Power Analysis Attacks
The Elliptic Curve Digital Signature Algorithm admits a natural parallelization wherein the point multiplication step can be split in two parts and executed in parallel. Further pa...
Sarang Aravamuthan, Viswanatha Rao Thumparthy
DFT
2009
IEEE
189views VLSI» more  DFT 2009»
15 years 4 months ago
Analyzing Formal Verification and Testing Efforts of Different Fault Tolerance Mechanisms
Pre-fabrication design verification and post-fabrication chip testing are two important stages in the product realization process. These two stages consume a large part of resourc...
Meng Zhang, Anita Lungu, Daniel J. Sorin
SBCCI
2006
ACM
139views VLSI» more  SBCCI 2006»
15 years 3 months ago
Infrastructure for dynamic reconfigurable systems: choices and trade-offs
Platform-based design is a method to implement complex SoCs, avoiding chip design from scratch. A promising evolution of platform-based design are MPSoC. Such generic architecture...
Leandro Möller, Rafael Soares, Ewerson Carval...
DIALM
2007
ACM
178views Algorithms» more  DIALM 2007»
15 years 1 months ago
Near-Optimal Compression of Probabilistic Counting Sketches for Networking Applications
Sketches--data structures for probabilistic, duplicate insensitive counting--are central building blocks of a number of recently proposed network protocols, for example in the con...
Björn Scheuermann, Martin Mauve
SBCCI
2005
ACM
114views VLSI» more  SBCCI 2005»
15 years 3 months ago
Traffic generation and performance evaluation for mesh-based NoCs
The designer of a system on a chip (SoC) that connects IP cores through a network on chip (NoC) needs methods to support application performance evaluation. Two key aspects these ...
Leonel Tedesco, Aline Mello, Diego Garibotti, Ney ...