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» Two VLSI Design Advances in Arithmetic Coding
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GLOBECOM
2007
IEEE
15 years 4 months ago
On the Design of Future Wireless Ad Hoc Networks
— In this paper, we study the design of future wireless ad hoc networks. Particularly, we consider that the future wireless ad hoc networks shall be able to efficiently provide ...
Kejie Lu, Shengli Fu, Tao Zhang, Yi Qian
SIGSOFT
2000
ACM
15 years 2 months ago
Designing robust Java programs with exceptions
Exception handling mechanisms are intended to help developers build robust systems. Although an exception handling mechanism provides a basis for structuring source code dealing w...
Martin P. Robillard, Gail C. Murphy
IPPS
1999
IEEE
15 years 2 months ago
A Factorial Performance Evaluation for Hierarchical Memory Systems
In this study, we introduce an evaluation methodology for advanced memory systems. This methodology is based on statistical factorial analysis. It is two fold: it first determines...
Xian-He Sun, Dongmei He, Kirk W. Cameron, Yong Luo
ASPDAC
2006
ACM
104views Hardware» more  ASPDAC 2006»
15 years 3 months ago
A multi-technology-process reticle floorplanner and wafer dicing planner for multi-project wafers
—As the VLSI manufacturing technology advances into the deep sub-micron(DSM) era, the mask cost can reach one or two million dollars. Multiple project wafers (MPW) which put di...
Chien-Chang Chen, Wai-Kei Mak
COMPSAC
2009
IEEE
15 years 2 months ago
Tool Support for Design Pattern Recognition at Model Level
Given the rapid rise of model-driven software development methodologies, it is highly desirable that tools be developed to support the use of design patterns in this context. This...
Hong Zhu, Ian Bayley, Lijun Shan, Richard Amphlett