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» Two efficient methods to reduce power and testing time
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ACCV
2006
Springer
15 years 5 months ago
An Efficient Real Time Low Bit Rate Video Codec
The implementation of a codec for real time applications such as video-conferencing at low bit rates is discussed. The discrete cosine transform has been used for compression, both...
Shikha Tripathi, R. Vikas, R. C. Jain
ICMCS
2005
IEEE
158views Multimedia» more  ICMCS 2005»
15 years 5 months ago
Processor Load Analysis for Mobile Multimedia Streaming: The Implication of Power Reduction
The software codec on mobile device introduces significant power consumption because the energy efficiency of general processor based system is much lower than that of the dedicat...
Min Li, Xiaobo Wu, Zihua Guo, Richard Yao, Xiaolan...
DAC
2004
ACM
16 years 21 days ago
Efficient on-line testing of FPGAs with provable diagnosabilities
We present novel and efficient methods for on-line testing in FPGAs. The testing approach uses a ROving TEster (ROTE), which has provable diagnosabilities and is also faster than ...
Vinay Verma, Shantanu Dutt, Vishal Suthar
ISLPED
2000
ACM
99views Hardware» more  ISLPED 2000»
15 years 4 months ago
Practical considerations of clock-powered logic
Recovering and reusing circuit energies that would otherwise be dissipated as heat can reduce the power dissipated by a VLSI chip. To accomplish this requires a power source that ...
William C. Athas
ICCAD
2003
IEEE
159views Hardware» more  ICCAD 2003»
15 years 8 months ago
Energy-Aware Fault Tolerance in Fixed-Priority Real-Time Embedded Systems
We investigate an integrated approach to fault tolerance and dynamic power management in real-time embedded systems. Fault tolerance is achieved via checkpointing and power manage...
Ying Zhang, Krishnendu Chakrabarty, Vishnu Swamina...