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CF
2004
ACM
15 years 5 months ago
Integrated temporal and spatial scheduling for extended operand clustered VLIW processors
Centralized register file architectures scale poorly in terms of clock rate, chip area, and power consumption and are thus not suitable for consumer electronic devices. The conse...
Rahul Nagpal, Y. N. Srikant
MICRO
2005
IEEE
139views Hardware» more  MICRO 2005»
15 years 5 months ago
Shader Performance Analysis on a Modern GPU Architecture
This paper presents an analysis of the performance of the shader processing units in a modern Graphics Processor Unit (GPU) architecture using real graphic applications. The archi...
Victor Moya Del Barrio, Carlos González, Jo...
JIRS
2010
153views more  JIRS 2010»
14 years 6 months ago
Flyphone: Visual Self-Localisation Using a Mobile Phone as Onboard Image Processor on a Quadrocopter
An unmanned aerial vehicle (UAV) needs to orient itself in its operating environment to fly autonomously. Localisation methods based on visual data are independent of erroneous GPS...
Sara Erhard, Karl Engelbert Wenzel, Andreas Zell
FCCM
2004
IEEE
152views VLSI» more  FCCM 2004»
15 years 3 months ago
Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
Noriaki Suzuki, Shunsuke Kurotaki, Masayasu Suzuki...
ECAI
2008
Springer
15 years 1 months ago
Using Natural Language Generation Technology to Improve Information Flows in Intensive Care Units
In the drive to improve patient safety, patients in modern intensive care units are closely monitored with the generation of very large volumes of data. Unless the data are further...
Jim Hunter, Albert Gatt, François Portet, E...