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» Tying Memory Management to Parallel Programming Models
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ASPLOS
2012
ACM
13 years 5 months ago
Providing safe, user space access to fast, solid state disks
Emerging fast, non-volatile memories (e.g., phase change memories, spin-torque MRAMs, and the memristor) reduce storage access latencies by an order of magnitude compared to state...
Adrian M. Caulfield, Todor I. Mollov, Louis Alex E...
MIDDLEWARE
2001
Springer
15 years 2 months ago
Thread Transparency in Information Flow Middleware
Abstract. Existing middleware is based on control-flow centric interaction models such as remote method invocations, poorly matching the structure of applications that process con...
Rainer Koster, Andrew P. Black, Jie Huang, Jonatha...
ESOP
2003
Springer
15 years 3 months ago
Using Controller-Synthesis Techniques to Build Property-Enforcing Layers
In complex systems, like robot plants, applications are built on top of a set of components, or devices. Each of them has particular individual constraints, and there are also log...
Karine Altisen, Aurélie Clodic, Florence Ma...
IEEEPACT
2005
IEEE
15 years 3 months ago
HUNTing the Overlap
Hiding communication latency is an important optimization for parallel programs. Programmers or compilers achieve this by using non-blocking communication primitives and overlappi...
Costin Iancu, Parry Husbands, Paul Hargrove
CCGRID
2011
IEEE
14 years 1 months ago
Network-Friendly One-Sided Communication through Multinode Cooperation on Petascale Cray XT5 Systems
—One-sided communication is important to enable asynchronous communication and data movement for Global Address Space (GAS) programming models. Such communication is typically re...
Xinyu Que, Weikuan Yu, Vinod Tipparaju, Jeffrey S....