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» Tying Memory Management to Parallel Programming Models
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DEXAW
2003
IEEE
108views Database» more  DEXAW 2003»
15 years 3 months ago
A Protocol for Programmable Smart Cards
This paper presents an open protocol for interoperability across multi-vendor programmable smart cards. It allows exposition of on-card storage and cryptographic services to host ...
Tommaso Cucinotta, Marco Di Natale, David Corcoran
EDO
2005
Springer
15 years 3 months ago
Optimizing layered middleware
Middleware is often built using a layered architectural style. Layered design provides good separation of the different concerns of middleware, such as communication, marshaling, ...
Ömer Erdem Demir, Premkumar T. Devanbu, Eric ...
IPPS
2010
IEEE
14 years 8 months ago
BlobSeer: Bringing high throughput under heavy concurrency to Hadoop Map-Reduce applications
Hadoop is a software framework supporting the Map/Reduce programming model. It relies on the Hadoop Distributed File System (HDFS) as its primary storage system. The efficiency of ...
Bogdan Nicolae, Diana Moise, Gabriel Antoniu, Luc ...
MAM
2006
125views more  MAM 2006»
14 years 10 months ago
Stream computations organized for reconfigurable execution
Reconfigurable systems can offer the high spatial parallelism and fine-grained, bit-level resource control traditionally associated with hardware implementations, along with the f...
André DeHon, Yury Markovsky, Eylon Caspi, M...
WOTUG
2008
14 years 11 months ago
Representation and Implementation of CSP and VCR Traces
Abstract. Communicating Sequential Processes (CSP) was developed around a formal algebra of processes and a semantics based on traces (and failures and divergences). A trace is a r...
Neil C. C. Brown, Marc L. Smith