628 search results - page 34 / 126 » Tying Memory Management to Parallel Programming Models |
HIPC
2004
Springer
15 years 3 months ago
2004
Springer
Abstract. Lock-free shared data structures in the setting of distributed computing have received a fair amount of attention. Major motivations of lock-free data structures include ...
ICLP
1995
Springer
15 years 1 months ago
1995
Springer
Incorporating the possibility of attaching attributes to variables in a logic programming system has been shown to allow the addition of general constraint solving capabilities to...
115
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HPCA
2011
IEEE
14 years 1 months ago
2011
IEEE
Contention management is an important design component to a transactional memory system. Without effective contention management to ensure forward progress, a transactional memory...
ICS
2009
Tsinghua U.
15 years 4 months ago
2009
Tsinghua U.
The Cell BE is a multicore processor with eight vector accelerators (called SPEs) that implement explicit cache management through direct memory access engines. While the Cell has...
106
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JCC
2008
14 years 10 months ago
2008
: For the new parallel implementation of electronic structure methods in ACES III (Lotrich et al., in preparation) the present state-of-the-art algorithms for the evaluation of ele...