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» Tying Memory Management to Parallel Programming Models
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IPPS
1998
IEEE
15 years 2 months ago
COMPaS: A Pentium Pro PC-based SMP Cluster and Its Experience
We have built an eight node SMP cluster called COMPaS (Cluster Of Multi-Processor Systems), each node of which is a quadprocessor Pentium Pro PC. We have designed and implemented a...
Yoshio Tanaka, Motohiko Matsuda, Makoto Ando, Kazu...
IPPS
2000
IEEE
15 years 2 months ago
The Memory Bandwidth Bottleneck and its Amelioration by a Compiler
As the speed gap between CPU and memory widens, memory hierarchy has become the primary factor limiting program performance. Until now, the principal focus of hardware and softwar...
Chen Ding, Ken Kennedy
83
Voted
WDAG
1995
Springer
102views Algorithms» more  WDAG 1995»
15 years 1 months ago
Larchant-RDOSS: a Distributed Shared Persistent Memory and its Garbage Collector
Larchant-RDOSS is a distributed shared memory that persists on reliable storage across process lifetimes. Memory management is automatic: including consistent caching of data and ...
Marc Shapiro, Paulo Ferreira
92
Voted
SBACPAD
2008
IEEE
170views Hardware» more  SBACPAD 2008»
15 years 4 months ago
Using Analytical Models to Efficiently Explore Hardware Transactional Memory and Multi-Core Co-Design
Transactional memory is emerging as a parallel programming paradigm for multi-core processors. Despite the recent interest in transactional memory, there has been no study to char...
James Poe, Chang-Burm Cho, Tao Li
IPPS
2006
IEEE
15 years 4 months ago
Compiler assisted dynamic management of registers for network processors
Modern network processors support high levels of parallelism in packet processing by supporting multiple threads that execute on a micro-engine. Threads switch context upon encoun...
R. Collins, Fernando Alegre, Xiaotong Zhuang, Sant...