628 search results - page 59 / 126 » Tying Memory Management to Parallel Programming Models |
117
Voted
PDP
2009
IEEE
15 years 7 months ago
2009
IEEE
There is a multicore platform that is currently concentrating an enormous attention due to its tremendous potential in terms of sustained performance: the NVIDIA Tesla boards. The...
70
Voted
ISCA
1997
IEEE
15 years 4 months ago
1997
IEEE
DataScalar architectures improve memory system performance by running computation redundantly across multiple processors, which are each tightly coupled with an associated memory....
133
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ICNS
2006
IEEE
15 years 6 months ago
2006
IEEE
– Service-Oriented Programming Model is a new methodology for building service-oriented applications. In the Service-Oriented Programming Model, an application is assembled from ...
109
Voted
HPCA
2009
IEEE
16 years 1 months ago
2009
IEEE
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...
CAISE
2001
Springer
15 years 5 months ago
2001
Springer
Information System Engineering has become under increasing pressure to come up with software solutions that endow systems with the agility that is required to evolve in a continual...