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FPGA
2001
ACM
123views FPGA» more  FPGA 2001»
15 years 4 months ago
Mixing buffers and pass transistors in FPGA routing architectures
The routing architecture of an FPGA consists of the length of the wires, the type of switch used to connect wires (buffered, unbuffered, fast or slow) and the topology of the inte...
Mike Sheng, Jonathan Rose
RTCSA
1999
IEEE
15 years 4 months ago
A Symbolic Model Checker for Testing ASTRAL Real-Time Specifications
ASTRAL is a high-level formal specification language for real-time (infinite state) systems. It is provided with structuring mechanisms that allow one to build modularized specifi...
Zhe Dang, Richard A. Kemmerer
FOCS
1992
IEEE
15 years 3 months ago
On the Fault Tolerance of Some Popular Bounded-Degree Networks
In this paper, we analyze the fault tolerance of several bounded-degree networks that are commonly used for parallel computation. Among other things, we show that an N-node butterf...
Frank Thomson Leighton, Bruce M. Maggs, Ramesh K. ...
AAAI
2008
15 years 2 months ago
Resource Constrained Distributed Constraint Optimization with Virtual Variables
Cooperative problem solving with resource constraints are important in practical multi-agent systems. Resource constraints are necessary to handle practical problems including dis...
Toshihiro Matsui, Hiroshi Matsuo, Marius Silaghi, ...
BMCBI
2008
104views more  BMCBI 2008»
14 years 12 months ago
Comparison of methods for estimating the nucleotide substitution matrix
Background: The nucleotide substitution rate matrix is a key parameter of molecular evolution. Several methods for inferring this parameter have been proposed, with different math...
Maribeth Oscamou, Daniel McDonald, Von Bing Yap, G...