In this paper, we propose an optimal gate sizing and clock skew optimization algorithm for globally sizing synchronous sequential circuits. The number of constraints and variables ...
Sanghamitra Roy, Yu Hen Hu, Charlie Chung-Ping Che...
- By putting different chips on the same mask, shuttle mask (or multiple project wafer) provides an economical solution for low volume designs and design prototypes to share the ri...
Gang Xu, Ruiqi Tian, David Z. Pan, Martin D. F. Wo...
Newer Prolog implementations commonly offer support for multi-threading, and have also begun to offer support for tabling. However, most implementations do not yet integrate tablin...
We introduce subsequence invariants, which characterize the behavior of a concurrent system in terms of the occurrences of synchronization events. Unlike state invariants, which re...
The crossing number problem is to find the smallest number of edge crossings necessary when drawing a graph into the plane. Eventhough the problem is NP-hard, we are interested in ...