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DATE
2007
IEEE
155views Hardware» more  DATE 2007»
15 years 3 months ago
Design fault directed test generation for microprocessor validation
Functional validation of modern microprocessors is an important and complex problem. One of the problems in functional validation is the generation of test cases that has higher p...
Deepak Mathaikutty, Sandeep K. Shukla, Sreekumar V...
VLSID
2002
IEEE
95views VLSI» more  VLSID 2002»
15 years 9 months ago
Design of an On-Chip Test Pattern Generator without Prohibited Pattern Set (PPS)
| This paper reports the design of a Test Pattern Generator (TPG) for VLSI circuits. The onchip TPG is so designed that it generates test patterns while avoiding generation of a gi...
Niloy Ganguly, Biplab K. Sikdar, Parimal Pal Chaud...
DAC
2003
ACM
15 years 2 months ago
Test generation for designs with multiple clocks
To improve the system performance, designs with multiple clocks have become more and more popular. In this paper, several novel test generation procedures are proposed to utilize ...
Xijiang Lin, Rob Thompson
SAC
2008
ACM
14 years 8 months ago
UML-based design test generation
In this paper we investigate and propose a fully automated technique to perform conformance checking of Java implementations against UML class diagrams. In our approach, we reused...
Waldemar Pires, João Brunet, Franklin Ramal...
ISSRE
2006
IEEE
15 years 3 months ago
A Systematic Approach to Generate Inputs to Test UML Design Models
Practical model validation techniques are needed for model driven development (MDD) techniques to succeed. This paper presents an approach to generating inputs to test UML design ...
Trung T. Dinh-Trong, Sudipto Ghosh, Robert B. Fran...