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ASPDAC
2007
ACM
119views Hardware» more  ASPDAC 2007»
15 years 10 months ago
Optimum Prefix Adders in a Comprehensive Area, Timing and Power Design Space
Parallel prefix adder is the most flexible and widely-used binary adder for ASIC designs. Many high-level synthesis techniques have been developed to find optimal prefix structures...
Jianhua Liu, Yi Zhu, Haikun Zhu, Chung-Kuan Cheng,...
ASPDAC
2007
ACM
140views Hardware» more  ASPDAC 2007»
15 years 10 months ago
An Architecture for Combined Test Data Compression and Abort-on-Fail Test
1 The low throughput at IC (Integrated Circuit) testing is mainly due to the increasing test data volume, which leads to high ATE (Automatic Test Equipment) memory requirements and...
Erik Larsson, Jon Persson
ATAL
2007
Springer
15 years 10 months ago
Temporal linear logic as a basis for flexible agent interactions
Interactions between agents in an open system such as the Internet require a significant degree of flexibility. A crucial aspect of the development of such methods is the notion o...
Duc Quang Pham, James Harland
CAV
2009
Springer
123views Hardware» more  CAV 2009»
15 years 10 months ago
On Using Floating-Point Computations to Help an Exact Linear Arithmetic Decision Procedure
We consider the decision problem for quantifier-free formulas whose atoms are linear inequalities interpreted over the reals or rationals. This problem may be decided using satisf...
David Monniaux
CASES
2007
ACM
15 years 10 months ago
Fragment cache management for dynamic binary translators in embedded systems with scratchpad
Dynamic binary translation (DBT) has been used to achieve numerous goals (e.g., better performance) for general-purpose computers. Recently, DBT has also attracted attention for e...
José Baiocchi, Bruce R. Childers, Jack W. D...
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