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111
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MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
15 years 9 months ago
ASR: Adaptive Selective Replication for CMP Caches
The large working sets of commercial and scientific workloads stress the L2 caches of Chip Multiprocessors (CMPs). Some CMPs use a shared L2 cache to maximize the on-chip cache c...
Bradford M. Beckmann, Michael R. Marty, David A. W...
154
Voted
CLUSTER
2005
IEEE
15 years 9 months ago
Fast Query Processing by Distributing an Index over CPU Caches
Data intensive applications on clusters often require requests quickly be sent to the node managing the desired data. In many applications, one must look through a sorted tree str...
Xiaoqin Ma, Gene Cooperman
145
Voted
WWW
2003
ACM
16 years 4 months ago
Efficient URL caching for world wide web crawling
Crawling the web is deceptively simple: the basic algorithm is (a) Fetch a page (b) Parse it to extract all linked URLs (c) For all the URLs not seen before, repeat (a)?(c). Howev...
Andrei Z. Broder, Marc Najork, Janet L. Wiener
111
Voted
CSREAESA
2006
15 years 5 months ago
Performance Analysis of Embedded Applications on a Pentium-4 Based Machine
Pradeep Nair, Dhireesha Kudithipudi, Eugene John, ...
148
Voted
TC
2010
15 years 2 months ago
Design and Analysis of On-Chip Networks for Large-Scale Cache Systems
—Switched networks have been adopted in on-chip communication for their scalability and efficient resource sharing. However, using a general network for a specific domain may res...
Yuho Jin, Eun Jung Kim, Ki Hwan Yum