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163
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LCTRTS
2005
Springer
15 years 9 months ago
Cache aware optimization of stream programs
Effective use of the memory hierarchy is critical for achieving high performance on embedded systems. We focus on the class of streaming applications, which is increasingly preval...
Janis Sermulins, William Thies, Rodric M. Rabbah, ...
149
Voted
HPCA
1998
IEEE
15 years 8 months ago
The Effectiveness of SRAM Network Caches in Clustered DSMs
The frequency of accesses to remote data is a key factor affecting the performance of all Distributed Shared Memory (DSM) systems. Remote data caching is one of the most effective...
Adrian Moga, Michel Dubois
ISCA
2010
IEEE
214views Hardware» more  ISCA 2010»
15 years 5 months ago
Translation caching: skip, don't walk (the page table)
This paper explores the design space of MMU caches that accelerate virtual-to-physical address translation in processor architectures, such as x86-64, that use a radix tree page t...
Thomas W. Barr, Alan L. Cox, Scott Rixner
CAL
2006
15 years 3 months ago
Adopting system call based address translation into user-level communication
User-level communication alleviates the software overhead of the communication subsystem by allowing applications to access the network interface directly. For that purpose, effici...
Moon-Sang Lee, Sang-Kwon Lee, Joonwon Lee, Seung R...
HPCA
2005
IEEE
16 years 4 months ago
A Unified Compressed Memory Hierarchy
The memory system's large and growing contribution to system performance motivates more aggressive approaches to improving its efficiency. We propose and analyze a memory hie...
Erik G. Hallnor, Steven K. Reinhardt