1217 search results - page 106 / 244 » Uncertainty-aware circuit optimization |
DATE
2003
IEEE
15 years 4 months ago
2003
IEEE
There are already a huge number of problems for silicon designers and it is likely to just get worse. Many of these problems are technical associated with shrinking geometries and...
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GLVLSI
2003
IEEE
15 years 4 months ago
2003
IEEE
One of the fundamental problems in Deep Sub Micron (DSM) circuits is Simultaneous Switching Noise (SSN), which causes voltage fluctuations in the circuit power/ground networks. In...
ISQED
2009
IEEE
15 years 6 months ago
2009
IEEE
Estimation of maximal power consumption is an essential task in VLSI circuit realizations since power value significantly affects the reliability of the circuits. The key issue o...
GECCO
2003
Springer
15 years 4 months ago
2003
Springer
Abstract. In this paper, we propose a hybrid genetic algorithm for partitioning a VLSI circuit graph into two disjoint graphs of minimum cut size. The algorithm includes a local op...
DATE
2009
IEEE
15 years 6 months ago
2009
IEEE
—Negative Bias Temperature Instability (NBTI) is a significant reliability concern for nanoscale CMOS circuits. Its effects on circuit timing can be especially pronounced for ci...