1217 search results - page 108 / 244 » Uncertainty-aware circuit optimization |
108
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FCT
2005
Springer
15 years 4 months ago
2005
Springer
We prove optimal lower bounds for multilinear circuits and for monotone circuits with bounded depth. These lower bounds state that, in order to compute certain functions, these cir...
105
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DAC
2003
ACM
15 years 4 months ago
2003
ACM
In this paper we propose a partitioning-based placement algorithm for FPGAs. The method incorporates simple, but effective heuristics that target delay minimization. The placement...
NOCS
2008
IEEE
15 years 5 months ago
2008
IEEE
—Circuit-switched networks can significantly lower the communication latency between processor cores, when compared to packet-switched networks, since once circuits are set up, ...
VLSID
2003
IEEE
15 years 11 months ago
2003
IEEE
In the previous work, the problem of nding gate delays to eliminate glitches has been solved by linear programs (LP) requiring an exponentially large number ofconstraints. By intr...
ASPDAC
2004
ACM
15 years 4 months ago
2004
ACM
Abstract We propose a novel approach to preserve the synchronizing sequences of a circuit after retiming. The significance of this problem stems from the necessity of maintaining c...