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» Uncertainty-aware circuit optimization
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ISPD
2004
ACM
150views Hardware» more  ISPD 2004»
15 years 4 months ago
Topology optimization of structured power/ground networks
This paper presents an efficient method for optimizing the design of power/ground (P/G) networks by using locally regular, globally irregular grids. The procedure divides the pow...
Jaskirat Singh, Sachin S. Sapatnekar
ISQED
2010
IEEE
177views Hardware» more  ISQED 2010»
15 years 6 months ago
Multi-corner, energy-delay optimized, NBTI-aware flip-flop design
With the CMOS transistors being scaled to sub 45nm and lower, Negative Bias Temperature Instability (NBTI) has become a major concern due to its impact on PMOS transistor aging pr...
Hamed Abrishami, Safar Hatami, Massoud Pedram
CRYPTO
2005
Springer
106views Cryptology» more  CRYPTO 2005»
15 years 4 months ago
Secure Computation of Constant-Depth Circuits with Applications to Database Search Problems
Motivated by database search problems such as partial match or nearest neighbor, we present secure multiparty computation protocols for constant-depth circuits. Specifically, for ...
Omer Barkol, Yuval Ishai
EUROGP
2009
Springer
105views Optimization» more  EUROGP 2009»
15 years 4 months ago
Quantum Circuit Synthesis with Adaptive Parameters Control
The contribution presented herein proposes an adaptive genetic algorithm applied to quantum logic circuit synthesis that, dynamically adjusts its control parameters. The adaptation...
Cristian Ruican, Mihai Udrescu, Lucian Prodan, Mir...
DAC
2005
ACM
16 years 10 days ago
FPGA technology mapping: a study of optimality
This paper attempts to quantify the optimality of FPGA technology mapping algorithms. We develop an algorithm, based on Boolean satisfiability (SAT), that is able to map a small s...
Andrew C. Ling, Deshanand P. Singh, Stephen Dean B...