1217 search results - page 120 / 244 » Uncertainty-aware circuit optimization |
DAC
2007
ACM
16 years 12 days ago
2007
ACM
High efficiency low voltage DC-DC conversion is a key enabler to the design of power-efficient integrated circuits. Typically a star configuration of the DC-DC converters, where o...
104
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DAC
2003
ACM
16 years 11 days ago
2003
ACM
As power consumption of the clock tree in modern VLSI designs tends to dominate, measures must be taken to keep it under control. This paper introduces an approach for reducing cl...
111
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ICCAD
2006
IEEE
15 years 8 months ago
2006
IEEE
An optimization algorithm for the design of combinational circuits that are robust to single-event upsets (SEUs) is described. A simple, highly accurate model for the SEU robustne...
ICCD
2004
IEEE
15 years 8 months ago
2004
IEEE
Potential slack is an effective metric of circuit’s possible performance improvement. It is equal to the maximal amount of slack that can be potentially used for optimization. I...
ICCAD
2007
IEEE
15 years 8 months ago
2007
IEEE
—We present an implementation of an algorithm for constructing provably fast circuits for a class of Boolean functions with input signals that have individual starting times. We ...