Sciweavers

1217 search results - page 121 / 244
» Uncertainty-aware circuit optimization
Sort
View
ICES
2003
Springer
151views Hardware» more  ICES 2003»
15 years 4 months ago
Using Genetic Programming and High Level Synthesis to Design Optimized Datapath
This paper presents a methodology to design optimized electronic systems from high abstraction level descriptions. The methodology uses Genetic Programming in addition to high-leve...
Sérgio G. Araújo, Antônio C. M...
ASPDAC
1999
ACM
60views Hardware» more  ASPDAC 1999»
15 years 3 months ago
Timing Optimization of Logic Network Using Gate Duplication
We present a timing optimization algorithm based on the concept of gate duplication on the technologydecomposed network. We first examine the relationship between gate duplication...
Chun-hong Chen, Chi-Ying Tsui
SAT
2004
Springer
106views Hardware» more  SAT 2004»
15 years 4 months ago
The Optimality of a Fast CNF Conversion and its Use with SAT
Despite the widespread use and study of Boolean satisfiability for a diverse range of problem domains, encoding of problems is usually given to general propositional logic with li...
Daniel Sheridan
ARITH
2003
IEEE
15 years 4 months ago
Some Optimizations of Hardware Multiplication by Constant Matrices
This paper presents some improvements on the optimization of hardware multiplication by constant matrices. We focus on the automatic generation of circuits that involve constant m...
Nicolas Boullis, Arnaud Tisserand
GLOBECOM
2010
IEEE
14 years 9 months ago
A Comparison of Modulations for Energy Optimization in Wireless Sensor Network Links
We study the energy consumption of individual links in wireless sensor networks (WSN). Three widely used digital modulation schemes, i.e. MQAM, MPSK, and MFSK, are analyzed and com...
Felipe M. Costa, Hideki Ochiai