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» Uncertainty-aware circuit optimization
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DAC
2004
ACM
16 years 12 days ago
Quantum logic synthesis by symbolic reachability analysis
Reversible quantum logic plays an important role in quantum computing. In this paper, we propose an approach to optimally synthesize quantum circuits by symbolic reachability anal...
William N. N. Hung, Xiaoyu Song, Guowu Yang, Jin Y...
DAC
2004
ACM
16 years 12 days ago
FPGA power reduction using configurable dual-Vdd
Power optimization is of growing importance for FPGAs in nanometer technologies. Considering dual-Vdd technique, we show that configurable power supply is required to obtain a sat...
Fei Li, Yan Lin, Lei He
DAC
2006
ACM
16 years 12 days ago
Criticality computation in parameterized statistical timing
Chips manufactured in 90 nm technology have shown large parametric variations, and a worsening trend is predicted. These parametric variations make circuit optimization difficult ...
Jinjun Xiong, Vladimir Zolotov, Natesan Venkateswa...
GLVLSI
2008
IEEE
117views VLSI» more  GLVLSI 2008»
15 years 5 months ago
Delay driven AIG restructuring using slack budget management
Timing optimizations during logic synthesis has become a necessary step to achieve timing closure in VLSI designs. This often involves “shortening” all paths found in the circ...
Andrew C. Ling, Jianwen Zhu, Stephen Dean Brown
DSN
2005
IEEE
15 years 5 months ago
Reversible Fault-Tolerant Logic
It is now widely accepted that the CMOS technology implementing irreversible logic will hit a scaling limit beyond 2016, and that the increased power dissipation is a major limiti...
P. Oscar Boykin, Vwani P. Roychowdhury