1217 search results - page 128 / 244 » Uncertainty-aware circuit optimization |
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FPGA
1999
ACM
15 years 3 months ago
1999
ACM
Pipelining of data path structures increases the throughput rate at the expense of enlarged resource usage and latency unless architectures optimized towards specific applications...
123
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DAC
2004
ACM
15 years 3 months ago
2004
ACM
The ability to control the variations in IC fabrication process is rapidly diminishing as feature sizes continue towards the sub-100 nm regime. As a result, there is an increasing...
CRYPTO
2012
Springer
13 years 1 months ago
2012
Springer
We propose a general multiparty computation protocol secure against an active adversary corrupting up to n−1 of the n players. The protocol may be used to compute securely arithm...
ICCAD
2002
IEEE
15 years 8 months ago
2002
IEEE
Abstract—Interconnects (wires, buffers, clock distribution networks, multiplexers and busses) consume a significant fraction of total circuit power. In this work, we demonstrat...
ICCAD
2005
IEEE
15 years 8 months ago
2005
IEEE
— As technology scales into the sub-90nm domain, manufacturing variations become an increasingly significant portion of circuit delay. As a result, delays must be modeled as sta...