1217 search results - page 137 / 244 » Uncertainty-aware circuit optimization |
134
Voted
ARVLSI
1999
IEEE
15 years 8 months ago
1999
IEEE
We describe a method to clock the domino pipeline at the maximum rate by using soft synchronizers between pipeline stages and thus allowing "time borrowing," i.e., allow...
132
Voted
ICCAD
2009
IEEE
15 years 1 months ago
2009
IEEE
We propose a layout-driven test-architecture design and optimization technique for core-based system-on-chips (SoCs) that are fabricated using three-dimensional (3D) integration. ...
145
Voted
CASES
2010
ACM
15 years 12 days ago
2010
ACM
Approximate arithmetic is a promising, new approach to lowenergy designs while tackling reliability issues. We present a method to optimally distribute a given energy budget among...
150
Voted
TCAD
2010
14 years 10 months ago
2010
In response to the increasing variations in integrated-circuit manufacturing, the current trend is to create designs that take these variations into account statistically. In this ...
123
Voted
ICCD
2004
IEEE
16 years 17 days ago
2004
IEEE
A cache access time model, PRACTICS (PRedictor of Access and Cycle TIme for Cache Stack), has been developed to optimize the memory array architecture for the minimum access and c...