1217 search results - page 143 / 244 » Uncertainty-aware circuit optimization |
115
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FOCS
1999
IEEE
15 years 4 months ago
1999
IEEE
Various efforts ([?, ?, ?]) have been made in recent years to derandomize probabilistic algorithms using the complexity theoretic assumption that there exists a problem in E = dti...
123
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DAC
2010
ACM
14 years 9 months ago
2010
ACM
Integrating a large number of on-chip voltage regulators holds the promise of solving many power delivery challenges through strong local load regulation and facilitates systemlev...
94
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ISPD
2010
ACM
15 years 6 months ago
2010
ACM
Timing-driven placement is a critical step in nanometerscale physical synthesis. To improve design timing on a global scale, net-weight based global timing-driven placement is a c...
100
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ISQED
2009
IEEE
15 years 6 months ago
2009
IEEE
— This paper revisits and extends a general linear programming(LP) formulation to exploit multiple knobs such as multi-Lgate footprint-compatible libraries and post-layout Lgateb...
116
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PATMOS
2007
Springer
15 years 5 months ago
2007
Springer
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...