1217 search results - page 146 / 244 » Uncertainty-aware circuit optimization |
78
Voted
ICCAD
2000
IEEE
15 years 4 months ago
2000
IEEE
This paper addresses the issue of timing driven gate duplication for delay optimization. Gate duplication has been used extensively for cutset minimization but the usefulness in m...
FPGA
2007
ACM
15 years 5 months ago
2007
ACM
Chip design in the nanometer regime is becoming increasingly difficult due to process variations. ASIC designers have adopted statistical optimization techniques to mitigate the e...
ISLPED
2004
ACM
15 years 5 months ago
2004
ACM
In an attempt to enable the cost-effective production of lowand mid-volume application-specific chips, researchers have proposed a number of so-called structured ASIC architectur...
100
Voted
DSD
2003
IEEE
15 years 5 months ago
2003
IEEE
This paper presents a method with an evolutionary approach to some of the tasks of integrated-circuit (IC) design. The work is focused on application-specific integrated circuits ...
EUROGP
1999
Springer
15 years 4 months ago
1999
Springer
Genetic programming is known to be capable of creating designs that satisfy prespecified high-level design requirements for analog electrical circuits and other complex structures...