1217 search results - page 156 / 244 » Uncertainty-aware circuit optimization |
120
Voted
FPGA
2010
ACM
16 years 15 days ago
2010
ACM
d hardware design from behavior-level abstraction has drawn wide interest in FPGA-based acceleration and configurable computing research field. However, for many high-level progra...
126
Voted
ISPD
2006
ACM
15 years 9 months ago
2006
ACM
The existing decoupling capacitance optimization approaches meet constraints on input impedance for package. In this paper, we show that using impedance as constraints leads to la...
148
Voted
ASPDAC
2004
ACM
15 years 9 months ago
2004
ACM
As the process technology advances into the deep submicron era, interconnect plays a dominant role in determining circuit performance and signal integrity. Buffer insertion is one...
139
Voted
ISLPED
2003
ACM
15 years 9 months ago
2003
ACM
We describe an optimization strategy for minimizing total power consumption using dual threshold voltage (Vth) technology. Significant power savings are possible by simultaneous a...
98
Voted
DAC
2008
ACM
16 years 4 months ago
2008
ACM
A low power passive equalizer using RL terminator is proposed and optimized in this work. The equalizer includes an inductor in series with the resistive terminator, which boosts ...