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» Uncertainty-aware circuit optimization
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SLIP
2005
ACM
15 years 4 months ago
Congestion prediction in early stages
Routability optimization has become a major concern in the physical design cycle of VLSI circuits. Due to the recent advances in VLSI technology, interconnect has become a dominan...
Chiu-Wing Sham, Evangeline F. Y. Young
FPGA
2004
ACM
126views FPGA» more  FPGA 2004»
15 years 4 months ago
A synthesis oriented omniscient manual editor
The cost functions used to evaluate logic synthesis transformations for FPGAs are far removed from the final speed and routability determined after placement, routing and timing a...
Tomasz S. Czajkowski, Jonathan Rose
DAC
2010
ACM
14 years 6 months ago
Node addition and removal in the presence of don't cares
This paper presents a logic restructuring technique named node addition and removal (NAR). It works by adding a node into a circuit to replace an existing node and then removing t...
Yung-Chih Chen, Chun-Yao Wang
DAC
2004
ACM
16 years 7 days ago
Automated design of operational transconductance amplifiers using reversed geometric programming
We present a method for designing operational amplifiers using reversed geometric programming, which is an extension of geometric programming that allows both convex and non-conve...
Johan P. Vanderhaegen, Robert W. Brodersen
DATE
2009
IEEE
109views Hardware» more  DATE 2009»
15 years 6 months ago
A design methodology for fully reconfigurable Delta-Sigma data converters
This paper presents a design methodology for fully reconfigurable low-voltage Delta-Sigma converters as for instance used in next-generation wireless applications. The design metho...
Yi Ke, Jan Craninckx, Georges G. E. Gielen