1217 search results - page 185 / 244 » Uncertainty-aware circuit optimization |
122
Voted
VTS
2002
IEEE
15 years 6 months ago
2002
IEEE
We present a software-based weighted random pattern scheme for testing delay faults in IP cores of programmable SoCs. We describe a method for determining static and transition pr...
120
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GLVLSI
2000
IEEE
15 years 5 months ago
2000
IEEE
Circuit interconnect has become a substantial obstacle in the design of high performance systems. In this paper we explore a new routing paradigm that strikes at the root of the i...
90
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TSP
2010
14 years 7 months ago
2010
This paper puts to use concepts and tools introduced in Part I to address a wide spectrum of noncausal sampling and reconstruction problems. Particularly, we follow the systemtheor...
107
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VLSID
2009
IEEE
16 years 1 months ago
2009
IEEE
We present the automatic test pattern generator TIGUAN based on a thread-parallel SAT solver. Due to a tight integration of the SAT engine into the ATPG algorithm and a carefully ...
ISCAS
2008
IEEE
15 years 7 months ago
2008
IEEE
— An extended version of sturdy MASH delta-sigma modulators is presented in this paper. Improved performance is achieved using in-band zero optimization. The challenges towards h...