1217 search results - page 186 / 244 » Uncertainty-aware circuit optimization |
ISQED
2008
IEEE
15 years 5 months ago
2008
IEEE
In this paper we present a parasitic aware, process variation tolerant optimization methodology that may be applied to nanoscale circuits to ensure better yield. A currentstarved ...
GECCO
2003
Springer
15 years 4 months ago
2003
Springer
Evolvable hardware provides the capability to evolve analog circuits to produce amplifier and filter functions. Conventional analog controller designs employ these same functions...
GECCO
2003
Springer
15 years 4 months ago
2003
Springer
Power consumption and portability issues are becoming increasingly significant in embedded system architectures. Therefore, it is important that chip architects and integrated circ...
DATE
2002
IEEE
15 years 4 months ago
2002
IEEE
In this paper, we study and implement a routabilitydriven floorplanner with buffer block planning. It evaluates the routability of a floorplan by computing the probability that ...
ICCAD
2000
IEEE
15 years 3 months ago
2000
IEEE
In this paper, we propose a new approach for VLSI interconnect global routing that can optimize both congestion and delay, which are often competing objectives. Our approach provi...