In this paper, we propose a novel on-chip voltage drop reduction technique for on-chip power delivery networks of VLSI systems in the presence of variational leakage current sourc...
We present a pipelining-aware router for FPGAs. The problem of routing pipelined signals is different from the conventional FPGA routing problem. For example, the two terminal N-D...
Software programming languages, such as C/C++, have been used as means for specifying hardware for quite a while. Different design methodologies have exploited the advantages of f...
There is a growing need to analyze and optimize the stand-by component of power in digital circuits designed for portable and battery-powered applications. Since these circuits re...
David Blaauw, Steven M. Martin, Trevor N. Mudge, K...
The race conditions often limit the smallest feasible clock period that the optimal clock skew scheduling can achieve. Therefore, the combination of clock skew scheduling and dela...